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1

[IEEE 2008 International Conference on Field Programmable Logic and Applications (FPL) - Heidelberg, Germany (2008.09.8-2008.09.10)] 2008 International Conference on Field Programmable Logic and Applications - SAT-based resource binding for reducing critical path delays

Kenshu Seto,, Yuta Nonaka,, Takuya Maruizumi,, Yasuhiro Shiraki,

Year:

2008

File:

PDF, 320 KB

2008

2

[IEEE 2007 Asia and South Pacific Design Automation Conference - Yokohama, Japan (2007.01.23-2007.01.26)] 2007 Asia and South Pacific Design Automation Conference - Protocol Transducer Synthesis using Divide and Conquer approach

Watanabe, Shota, Seto, Kenshu, Ishikawa, Yuji, Komatsu, Satoshi, Fujita, Masahiro

Year:

2007

Language:

english

File:

PDF, 380 KB

english, 2007

3

[IEEE 2008 Symposium on Application Specific Processors (SASP) - Anaheim, CA, USA (2008.06.8-2008.06.9)] 2008 Symposium on Application Specific Processors - Custom Instruction Generation with High-Level Synthesis

Seto, Kenshu, Fujita, Masahiro

Year:

2008

File:

PDF, 437 KB

2008

4

[IEEE 2006 IEEE International Conference on Field Programmable Technology - Bangkok, Thailand (2006.12.13-2006.12.15)] 2006 IEEE International Conference on Field Programmable Technology - Dynamically reconfigurable protocol transducer

Watanabe, Shota, Ishikawa, Yuji, Seto, Kenshu, Komatsu, Satoshi, Fujita, Masahiro

Year:

2006

Language:

english

File:

PDF, 194 KB

english, 2006

5

International Conference Report

Journal:

IEICE ESS Fundamentals Review

Year:

2013

File:

PDF, 753 KB

2013

6

Loop Fusion with Outer Loop Shifting for High-level Synthesis

Kato, Yuta, Seto, Kenshu

Journal:

IPSJ Transactions on System LSI Design Methodology

Year:

2013

Language:

english

File:

PDF, 353 KB

english, 2013

7

Forwarding Unit Generation for Loop Pipelining in High-level Synthesis

Kusakabe, Shingo, Seto, Kenshu

Journal:

IPSJ Transactions on System LSI Design Methodology

Year:

2014

Language:

english

File:

PDF, 510 KB

english, 2014

8

Custom Instruction Generation for Configurable Processors with Limited Numbers of Operands

Seto, Kenshu, Fujita, Masahiro

Journal:

IPSJ Transactions on System LSI Design Methodology

Year:

2010

Language:

english

File:

PDF, 814 KB

english, 2010

9

[IEEE 2019 20th International Symposium on Quality Electronic Design (ISQED) - Santa Clara, CA, USA (2019.3.6-2019.3.7)] 20th International Symposium on Quality Electronic Design (ISQED) - Small Memory Footprint Neural Network Accelerators

Seto, Kenshu, Nejatollahi, Hamid, An, Jiyoung, Kang, Sujin, Dutt, Nikil

Year:

2019

Language:

english

File:

PDF, 673 KB

english, 2019

10

Scalar Replacement with Polyhedral Model

Journal:

IPSJ Transactions on System LSI Design Methodology

Year:

2018

Language:

english

File:

PDF, 1.28 MB

english, 2018

11

Scalar Replacement with Circular Buffers

Journal:

IPSJ Transactions on System LSI Design Methodology

Year:

2019

Language:

english

File:

PDF, 872 KB

english, 2019

12

Shift Register Initialization in Scalar Replacement for Reducing Code Size

Journal:

IPSJ Transactions on System LSI Design Methodology

Year:

2020

File:

PDF, 1.06 MB

2020

13

Dependence Graph Based Verification and Synthesis of Hardware/Software Co-Designs with SAT Related Formulation

Fujita, Masahiro, Seto, Kenshu, Sakunkonchak, Thanyapat, Velev, Miroslav N.

Journal:

Journal on Satisfiability, Boolean Modeling and Computation

Year:

2008

File:

PDF, 915 KB

2008